{"id":2271,"date":"2026-09-01T19:08:31","date_gmt":"2026-09-01T12:08:31","guid":{"rendered":"https:\/\/yourapx.com\/?p=2271"},"modified":"2026-09-01T19:08:31","modified_gmt":"2026-09-01T12:08:31","slug":"mosfet","status":"publish","type":"post","link":"https:\/\/yourapx.com\/?p=2271","title":{"rendered":"MOSFET l\u00e0 g\u00ec? K\u00fd hi\u1ec7u, c\u00e1ch m\u1eafc, c\u00e1ch \u0111o v\u00e0 \u1ee9ng d\u1ee5ng"},"content":{"rendered":"

1. MOSFET l\u00e0 g\u00ec v\u00e0 c\u00f3 vai tr\u00f2 g\u00ec?<\/h2>\n

MOSFET l\u00e0 transistor hi\u1ec7u \u1ee9ng tr\u01b0\u1eddng c\u00f3 c\u1ed5ng c\u00e1ch \u0111i\u1ec7n. \u0110i\u1ec7n \u00e1p gi\u1eefa gate v\u00e0 source \u0111i\u1ec1u khi\u1ec3n \u0111\u1ed9 d\u1eabn c\u1ee7a k\u00eanh drain\u2013source; linh ki\u1ec7n \u0111\u01b0\u1ee3c d\u00f9ng \u0111\u1ec3 \u0111\u00f3ng c\u1eaft ngu\u1ed3n, \u0111i\u1ec1u khi\u1ec3n t\u1ea3i v\u00e0 khu\u1ebfch \u0111\u1ea1i.<\/p>\n

Ph\u1ea7n quan tr\u1ecdng nh\u1ea5t l\u00e0 x\u00e1c \u0111\u1ecbnh linh ki\u1ec7n n\u00e0y \u0111ang l\u00e0m nhi\u1ec7m v\u1ee5 g\u00ec trong kh\u1ed1i m\u1ea1ch tr\u01b0\u1edbc khi \u0111o ho\u1eb7c ch\u1ecdn linh ki\u1ec7n thay th\u1ebf.<\/p>\n

2. K\u00fd hi\u1ec7u MOSFET trong s\u01a1 \u0111\u1ed3 m\u1ea1ch \u0111i\u1ec7n<\/h2>\n

K\u00fd hi\u1ec7u ph\u1ea3i ghi r\u00f5 G, D, S v\u00e0 ph\u00e2n bi\u1ec7t MOSFET k\u00eanh N v\u1edbi k\u00eanh P. MOSFET c\u00f4ng su\u1ea5t r\u1eddi th\u01b0\u1eddng c\u00f3 diode th\u00e2n; chi\u1ec1u diode n\u00e0y c\u0169ng \u0111\u1ed5i theo lo\u1ea1i k\u00eanh.<\/p>\n

Transistor th\u01b0\u1eddng mang m\u00e3 Q. K\u00fd hi\u1ec7u Q1, Q2\u2026 ph\u1ea3i \u0111\u01b0\u1ee3c \u0111\u1ecdc c\u00f9ng t\u00ean c\u00e1c c\u1ef1c v\u00e0 chi\u1ec1u k\u00fd hi\u1ec7u tr\u00ean s\u01a1 \u0111\u1ed3.<\/p>\n

\"K\u00fd
K\u00fd hi\u1ec7u v\u00e0 quy \u01b0\u1edbc ch\u00e2n c\u1ee7a MOSFET trong s\u01a1 \u0111\u1ed3 m\u1ea1ch \u0111i\u1ec7n<\/figcaption><\/figure>\n
\n

MOSFET k\u00eanh N v\u00e0 MOSFET k\u00eanh P kh\u00e1c nhau th\u1ebf n\u00e0o?<\/h3>\n

Hai lo\u1ea1i \u0111\u1ec1u c\u00f3 ba c\u1ef1c gate (G), drain (D) v\u00e0 source (S), nh\u01b0ng c\u1ef1c t\u00ednh \u0111i\u1ec1u khi\u1ec3n, chi\u1ec1u diode th\u00e2n v\u00e0 v\u1ecb tr\u00ed d\u00f9ng ph\u1ed5 bi\u1ebfn l\u00e0 ng\u01b0\u1ee3c nhau. Ph\u1ea3i g\u1ecdi \u0111\u1ea7y \u0111\u1ee7 \u201cMOSFET k\u00eanh N\u201d ho\u1eb7c \u201cMOSFET k\u00eanh P\u201d, kh\u00f4ng d\u00f9ng m\u1ed9t k\u00fd hi\u1ec7u chung \u0111\u1ec3 thay cho c\u1ea3 hai.<\/p>\n

\n\n\n\n\n\n\n\n\n
\u0110i\u1ec3m so s\u00e1nh<\/th>\nMOSFET k\u00eanh N<\/th>\nMOSFET k\u00eanh P<\/th>\n<\/tr>\n<\/thead>\n
\u0110i\u1ec1u ki\u1ec7n \u0111i\u1ec1u khi\u1ec3n<\/td>\nGate cao h\u01a1n source: UGS<\/sub> = UG<\/sub> \u2212 US<\/sub> d\u01b0\u01a1ng v\u00e0 \u0111\u1ee7 l\u1edbn.<\/td>\nGate th\u1ea5p h\u01a1n source: USG<\/sub> = US<\/sub> \u2212 UG<\/sub> d\u01b0\u01a1ng, t\u01b0\u01a1ng \u0111\u01b0\u01a1ng UGS<\/sub> \u00e2m.<\/td>\n<\/tr>\n
V\u1ecb tr\u00ed th\u01b0\u1eddng g\u1eb7p<\/td>\nKh\u00f3a low-side; c\u0169ng d\u00f9ng high-side khi c\u00f3 driver n\u00e2ng \u00e1p.<\/td>\nKh\u00f3a high-side \u1edf ngu\u1ed3n DC c\u00f3 \u0111i\u1ec7n \u00e1p v\u1eeba ph\u1ea3i.<\/td>\n<\/tr>\n
Diode th\u00e2n \u1edf linh ki\u1ec7n r\u1eddi<\/td>\nAnode \u1edf source, cathode \u1edf drain.<\/td>\nAnode \u1edf drain, cathode \u1edf source.<\/td>\n<\/tr>\n
Khi t\u1eaft<\/td>\nUGS<\/sub> g\u1ea7n 0 V; c\u00f3 th\u1ec3 c\u1ea7n \u0111i\u1ec7n tr\u1edf k\u00e9o gate v\u1ec1 source.<\/td>\nUSG<\/sub> g\u1ea7n 0 V; c\u00f3 th\u1ec3 c\u1ea7n \u0111i\u1ec7n tr\u1edf k\u00e9o gate l\u00ean source.<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/div>\n

L\u01b0u \u00fd quan tr\u1ecdng:<\/strong> UGS(th)<\/sub> ch\u1ec9 l\u00e0 ng\u01b0\u1ee1ng b\u1eaft \u0111\u1ea7u xu\u1ea5t hi\u1ec7n d\u00f2ng nh\u1ecf trong \u0111i\u1ec1u ki\u1ec7n th\u1eed c\u1ee7a nh\u00e0 s\u1ea3n xu\u1ea5t, kh\u00f4ng ph\u1ea3i \u0111i\u1ec7n \u00e1p b\u1ea3o \u0111\u1ea3m MOSFET \u0111\u00e3 m\u1edf ho\u00e0n to\u00e0n. Mu\u1ed1n t\u00ednh t\u1ed5n hao ph\u1ea3i d\u00f9ng RDS(on)<\/sub> t\u1ea1i \u0111\u00fang UGS<\/sub> v\u00e0 nhi\u1ec7t \u0111\u1ed9.<\/p>\n<\/section>\n

3. C\u1ea5u t\u1ea1o, h\u00ecnh d\u1ea1ng v\u00e0 ki\u1ec3u \u0111\u00f3ng g\u00f3i<\/h2>\n

Gate \u0111\u01b0\u1ee3c c\u00e1ch \u0111i\u1ec7n v\u1edbi v\u00f9ng k\u00eanh b\u1edfi l\u1edbp \u0111i\u1ec7n m\u00f4i r\u1ea5t m\u1ecfng, v\u00ec v\u1eady d\u00f2ng DC v\u00e0o gate g\u1ea7n nh\u01b0 b\u1eb1ng kh\u00f4ng nh\u01b0ng gate v\u1eabn c\u00f3 \u0111i\u1ec7n dung v\u00e0 \u0111i\u1ec7n t\u00edch c\u1ea7n n\u1ea1p\/x\u1ea3. C\u1ea5u tr\u00fac c\u00f4ng su\u1ea5t t\u1ea1o diode th\u00e2n gi\u1eefa source v\u00e0 drain; l\u1edbp oxide gate nh\u1ea1y v\u1edbi ESD v\u00e0 qu\u00e1 \u00e1p.<\/p>\n

Nh\u1eefng ki\u1ec3u v\u1ecf v\u00e0 ki\u1ec3u l\u1eafp th\u01b0\u1eddng g\u1eb7p g\u1ed3m:<\/p>\n

    \n
  • TO-92<\/li>\n
  • SOT-23\/SOT-223<\/li>\n
  • TO-220\/TO-247<\/li>\n
  • DFN\/QFN c\u00f4ng su\u1ea5t<\/li>\n
  • Module c\u00f4ng su\u1ea5t<\/li>\n<\/ul>\n
    \"MOSFET
    \u1ea2nh th\u1ef1c t\u1ebf 1 c\u1ee7a MOSFET d\u00f9ng \u0111\u1ec3 nh\u1eadn bi\u1ebft h\u00ecnh d\u1ea1ng t\u1ed5ng th\u1ec3.<\/figcaption><\/figure>\n

    4. C\u00e1c ch\u1ee7ng lo\u1ea1i ph\u1ed5 bi\u1ebfn<\/h2>\n

    M\u1ed7i ch\u1ee7ng lo\u1ea1i c\u00f3 \u01b0u \u0111i\u1ec3m, gi\u1edbi h\u1ea1n v\u00e0 m\u00f4i tr\u01b0\u1eddng s\u1eed d\u1ee5ng kh\u00e1c nhau; kh\u00f4ng n\u00ean thay l\u1eabn ch\u1ec9 v\u00ec c\u00f3 h\u00ecnh d\u1ea1ng g\u1ea7n gi\u1ed1ng.<\/p>\n

      \n
    • K\u00eanh N<\/li>\n
    • K\u00eanh P<\/li>\n
    • Logic-level<\/li>\n
    • Superjunction<\/li>\n
    • SiC\/GaN theo \u0111\u00fang ch\u1ee7ng lo\u1ea1i<\/li>\n<\/ul>\n
      \"MOSFET
      \u1ea2nh th\u1ef1c t\u1ebf 2 c\u1ee7a MOSFET d\u00f9ng \u0111\u1ec3 quan s\u00e1t chi ti\u1ebft tr\u00ean linh ki\u1ec7n ho\u1eb7c bo m\u1ea1ch.<\/figcaption><\/figure>\n

      5. C\u00e1c th\u00f4ng s\u1ed1 k\u1ef9 thu\u1eadt c\u1ea7n hi\u1ec3u<\/h2>\n
        \n
      • VDS:<\/strong> c\u1ea7n \u0111\u01b0\u1ee3c \u0111\u1ecdc c\u00f9ng \u0111\u01a1n v\u1ecb, \u0111i\u1ec1u ki\u1ec7n \u0111o v\u00e0 gi\u1edbi h\u1ea1n do nh\u00e0 s\u1ea3n xu\u1ea5t c\u00f4ng b\u1ed1.<\/li>\n
      • ID:<\/strong> c\u1ea7n \u0111\u01b0\u1ee3c \u0111\u1ecdc c\u00f9ng \u0111\u01a1n v\u1ecb, \u0111i\u1ec1u ki\u1ec7n \u0111o v\u00e0 gi\u1edbi h\u1ea1n do nh\u00e0 s\u1ea3n xu\u1ea5t c\u00f4ng b\u1ed1.<\/li>\n
      • RDS(on) t\u1ea1i \u0111\u00fang VGS:<\/strong> c\u1ea7n \u0111\u01b0\u1ee3c \u0111\u1ecdc c\u00f9ng \u0111\u01a1n v\u1ecb, \u0111i\u1ec1u ki\u1ec7n \u0111o v\u00e0 gi\u1edbi h\u1ea1n do nh\u00e0 s\u1ea3n xu\u1ea5t c\u00f4ng b\u1ed1.<\/li>\n
      • VGS(th) kh\u00f4ng ph\u1ea3i \u0111i\u1ec7n \u00e1p m\u1edf ho\u00e0n to\u00e0n:<\/strong> l\u00e0 gi\u1edbi h\u1ea1n \u0111i\u1ec7n \u00e1p ph\u00f9 h\u1ee3p v\u1edbi c\u00e1ch \u0111i\u1ec7n v\u00e0 ch\u1ebf \u0111\u1ed9 ho\u1ea1t \u0111\u1ed9ng c\u1ee7a linh ki\u1ec7n.<\/li>\n
      • Qg:<\/strong> c\u1ea7n \u0111\u01b0\u1ee3c \u0111\u1ecdc c\u00f9ng \u0111\u01a1n v\u1ecb, \u0111i\u1ec1u ki\u1ec7n \u0111o v\u00e0 gi\u1edbi h\u1ea1n do nh\u00e0 s\u1ea3n xu\u1ea5t c\u00f4ng b\u1ed1.<\/li>\n
      • SOA:<\/strong> c\u1ea7n \u0111\u01b0\u1ee3c \u0111\u1ecdc c\u00f9ng \u0111\u01a1n v\u1ecb, \u0111i\u1ec1u ki\u1ec7n \u0111o v\u00e0 gi\u1edbi h\u1ea1n do nh\u00e0 s\u1ea3n xu\u1ea5t c\u00f4ng b\u1ed1.<\/li>\n
      • Nhi\u1ec7t tr\u1edf:<\/strong> cho bi\u1ebft ph\u1ea1m vi nhi\u1ec7t \u0111\u1ed9 cho ph\u00e9p v\u00e0 \u1ea3nh h\u01b0\u1edfng c\u1ee7a nhi\u1ec7t \u0111\u1ebfn \u0111\u1ed9 \u1ed5n \u0111\u1ecbnh, tu\u1ed5i th\u1ecd.<\/li>\n<\/ul>\n
        \"H\u00ecnh
        H\u00ecnh k\u1ef9 thu\u1eadt tham kh\u1ea3o 1: H\u00ecnh minh h\u1ecda c\u1ea5u t\u1ea1o, nguy\u00ean l\u00fd ho\u1eb7c \u0111\u1eb7c t\u00ednh c\u1ee7a MOSFET. Ngu\u1ed3n: Complete Wireless Design, trang 23.<\/figcaption><\/figure>\n
        \"H\u00ecnh
        H\u00ecnh k\u1ef9 thu\u1eadt tham kh\u1ea3o 2: H\u00ecnh minh h\u1ecda c\u1ea5u t\u1ea1o, nguy\u00ean l\u00fd ho\u1eb7c \u0111\u1eb7c t\u00ednh c\u1ee7a MOSFET. Ngu\u1ed3n: Complete Wireless Design, trang 24.<\/figcaption><\/figure>\n
        \"MOSFET
        \u1ea2nh th\u1ef1c t\u1ebf 3 c\u1ee7a MOSFET d\u00f9ng \u0111\u1ec3 quan s\u00e1t chi ti\u1ebft tr\u00ean linh ki\u1ec7n ho\u1eb7c bo m\u1ea1ch.<\/figcaption><\/figure>\n

        6. C\u00f4ng th\u1ee9c to\u00e1n h\u1ecdc v\u00e0 v\u1eadt l\u00fd<\/h2>\n

        C\u00e1c c\u00f4ng th\u1ee9c d\u01b0\u1edbi \u0111\u00e2y m\u00f4 t\u1ea3 quan h\u1ec7 gi\u1eefa nh\u1eefng \u0111\u1ea1i l\u01b0\u1ee3ng quan tr\u1ecdng c\u1ee7a linh ki\u1ec7n. U l\u00e0 \u0111i\u1ec7n \u00e1p, I l\u00e0 d\u00f2ng \u0111i\u1ec7n, R l\u00e0 \u0111i\u1ec7n tr\u1edf, P l\u00e0 c\u00f4ng su\u1ea5t, E ho\u1eb7c W l\u00e0 n\u0103ng l\u01b0\u1ee3ng, f l\u00e0 t\u1ea7n s\u1ed1 v\u00e0 t l\u00e0 th\u1eddi gian; \u0111\u01a1n v\u1ecb l\u1ea7n l\u01b0\u1ee3t l\u00e0 V, A, \u03a9, W, J, Hz v\u00e0 s.<\/p>\n

        \n
        \u0110i\u1ec7n \u00e1p \u0111i\u1ec1u khi\u1ec3n k\u00eanh N<\/figcaption>
        UGS<\/sub> = UG<\/sub> \u2212 US<\/sub><\/div>\n
        \n

        \u00dd ngh\u0129a:<\/strong> Cho bi\u1ebft gate cao h\u01a1n source bao nhi\u00eau volt.<\/p>\n

          \n
        • UG: \u0111i\u1ec7n \u00e1p gate<\/li>\n
        • US: \u0111i\u1ec7n \u00e1p source<\/li>\n<\/ul>\n

          \u0110i\u1ec1u ki\u1ec7n \u00e1p d\u1ee5ng:<\/strong> K\u00eanh N enhancement d\u1eabn m\u1ea1nh khi UGS \u0111\u1ee7 d\u01b0\u01a1ng theo b\u1ea3ng RDS(on), kh\u00f4ng ch\u1ec9 v\u1eeba v\u01b0\u1ee3t UGS(th).<\/p>\n<\/div>\n<\/figure>\n

          \u0110i\u1ec7n \u00e1p \u0111i\u1ec1u khi\u1ec3n k\u00eanh P<\/figcaption>
          USG<\/sub> = US<\/sub> \u2212 UG<\/sub><\/div>\n
          \n

          \u00dd ngh\u0129a:<\/strong> D\u00f9ng \u0111\u1ea1i l\u01b0\u1ee3ng d\u01b0\u01a1ng \u0111\u1ec3 m\u00f4 t\u1ea3 gate th\u1ea5p h\u01a1n source \u1edf MOSFET k\u00eanh P.<\/p>\n

          \u0110i\u1ec1u ki\u1ec7n \u00e1p d\u1ee5ng:<\/strong> Kh\u00f4ng \u0111\u01b0\u1ee3c v\u01b0\u1ee3t gi\u1edbi h\u1ea1n |UGS|max; m\u1ee9c m\u1edf ho\u00e0n to\u00e0n ph\u1ea3i \u0111\u1ecdc t\u1ea1i \u0111\u00fang RDS(on) c\u1ee7a datasheet.<\/p>\n<\/div>\n<\/figure>\n

          T\u1ed5n hao d\u1eabn<\/figcaption>
          Pcond<\/sub> \u2248 ID,rms<\/sub>2<\/sup> \u00d7 RDS(on)<\/sub><\/div>\n
          \n

          \u00dd ngh\u0129a:<\/strong> Nhi\u1ec7t sinh ra do \u0111i\u1ec7n tr\u1edf k\u00eanh khi MOSFET d\u1eabn.<\/p>\n

          \u0110i\u1ec1u ki\u1ec7n \u00e1p d\u1ee5ng:<\/strong> D\u00f9ng RDS(on) t\u1ea1i \u0111\u00fang UGS v\u00e0 nhi\u1ec7t \u0111\u1ed9; RDS(on) th\u01b0\u1eddng t\u0103ng khi n\u00f3ng.<\/p>\n

          V\u00ed d\u1ee5:<\/strong> ID,rms = 5 A v\u00e0 RDS(on) = 20 m\u03a9 cho Pcond \u2248 0,5 W.<\/p>\n<\/div>\n<\/figure>\n

          T\u1ed5n hao chuy\u1ec3n m\u1ea1ch g\u1ea7n \u0111\u00fang<\/figcaption>
          Psw<\/sub> \u2248 \u00bd \u00d7 UDS<\/sub> \u00d7 ID<\/sub> \u00d7 (tr<\/sub> + tf<\/sub>) \u00d7 fsw<\/sub><\/div>\n
          \n

          \u00dd ngh\u0129a:<\/strong> \u01af\u1edbc l\u01b0\u1ee3ng ph\u1ea7n n\u0103ng l\u01b0\u1ee3ng m\u1ea5t trong kho\u1ea3ng \u0111i\u1ec7n \u00e1p v\u00e0 d\u00f2ng c\u00f9ng t\u1ed3n t\u1ea1i khi b\u1eadt\/t\u1eaft.<\/p>\n

          \u0110i\u1ec1u ki\u1ec7n \u00e1p d\u1ee5ng:<\/strong> Ch\u1ec9 l\u00e0 g\u1ea7n \u0111\u00fang; d\u1ea1ng s\u00f3ng th\u1eadt, \u0111i\u1ec7n c\u1ea3m k\u00fd sinh v\u00e0 diode h\u1ed3i ti\u1ebfp c\u00f3 th\u1ec3 l\u00e0m k\u1ebft qu\u1ea3 kh\u00e1c.<\/p>\n<\/div>\n<\/figure>\n

          C\u00f4ng su\u1ea5t \u0111i\u1ec1u khi\u1ec3n gate<\/figcaption>
          Pgate<\/sub> \u2248 Qg<\/sub> \u00d7 Udrive<\/sub> \u00d7 fsw<\/sub><\/div>\n
          \n

          \u00dd ngh\u0129a:<\/strong> Cho bi\u1ebft c\u00f4ng su\u1ea5t trung b\u00ecnh driver d\u00f9ng \u0111\u1ec3 n\u1ea1p v\u00e0 x\u1ea3 gate.<\/p>\n

          \u0110i\u1ec1u ki\u1ec7n \u00e1p d\u1ee5ng:<\/strong> Qg ph\u1ea3i l\u1ea5y t\u1ea1i \u0111i\u1ec1u ki\u1ec7n VDS v\u00e0 UGS ph\u00f9 h\u1ee3p trong datasheet.<\/p>\n<\/div>\n<\/figure>\n

          Nhi\u1ec7t \u0111\u1ed9 m\u1ed1i n\u1ed1i<\/figcaption>
          TJ<\/sub> \u2248 TA<\/sub> + Ptotal<\/sub> \u00d7 R\u03b8JA<\/sub><\/div>\n
          \n

          \u00dd ngh\u0129a:<\/strong> Li\u00ean h\u1ec7 t\u1ed5ng t\u1ed5n hao v\u1edbi \u0111\u1ed9 t\u0103ng nhi\u1ec7t c\u1ee7a chip so v\u1edbi m\u00f4i tr\u01b0\u1eddng.<\/p>\n

          \u0110i\u1ec1u ki\u1ec7n \u00e1p d\u1ee5ng:<\/strong> R\u03b8JA ch\u1ec9 ph\u00f9 h\u1ee3p v\u1edbi \u0111i\u1ec1u ki\u1ec7n PCB v\u00e0 lu\u1ed3ng kh\u00ed \u0111\u00e3 n\u00eau; khi c\u00f3 t\u1ea3n nhi\u1ec7t n\u00ean t\u00ednh theo chu\u1ed7i tr\u1edf nhi\u1ec7t t\u1eeb junction \u0111\u1ebfn case v\u00e0 ambient.<\/p>\n<\/div>\n<\/figure>\n<\/div>\n

          K\u00fd hi\u1ec7u c\u00f3 ch\u1ec9 s\u1ed1 d\u01b0\u1edbi d\u00f9ng \u0111\u1ec3 ch\u1ec9 \u0111\u00fang v\u1ecb tr\u00ed ho\u1eb7c tr\u1ea1ng th\u00e1i \u0111o, ch\u1eb3ng h\u1ea1n Ura<\/sub> l\u00e0 \u0111i\u1ec7n \u00e1p \u0111\u1ea7u ra v\u00e0 Ushunt<\/sub> l\u00e0 \u0111i\u1ec7n \u00e1p tr\u00ean \u0111i\u1ec7n tr\u1edf shunt. V\u1edbi k\u00fd hi\u1ec7u ri\u00eang c\u1ee7a t\u1eebng h\u1ecd linh ki\u1ec7n, c\u1ea7n \u0111\u1ecdc \u0111\u1ecbnh ngh\u0129a ngay trong datasheet.<\/p>\n

          C\u00f4ng th\u1ee9c l\u00fd t\u01b0\u1edfng ch\u1ec9 \u0111\u00fang trong \u0111i\u1ec1u ki\u1ec7n \u0111\u00e3 n\u00eau. Khi ch\u1ecdn linh ki\u1ec7n th\u1eadt ph\u1ea3i t\u00ednh th\u00eam dung sai, nhi\u1ec7t \u0111\u1ed9, t\u1ea7n s\u1ed1, t\u1ea3i v\u00e0 gi\u1edbi h\u1ea1n trong datasheet.<\/p>\n

          \"MOSFET
          \u1ea2nh th\u1ef1c t\u1ebf 4 c\u1ee7a MOSFET d\u00f9ng \u0111\u1ec3 quan s\u00e1t chi ti\u1ebft tr\u00ean linh ki\u1ec7n ho\u1eb7c bo m\u1ea1ch.<\/figcaption><\/figure>\n

          7. C\u00e1c c\u00e1ch m\u1eafc MOSFET trong m\u1ea1ch \u0111i\u1ec7n t\u1eed<\/h2>\n

          C\u00e1c c\u00e1ch m\u1eafc \u0111\u01b0\u1ee3c s\u1eafp x\u1ebfp t\u1eeb d\u1ec5 nh\u1eadn bi\u1ebft \u0111\u1ebfn \u1ee9ng d\u1ee5ng n\u00e2ng cao. \u1ede m\u1ed7i s\u01a1 \u0111\u1ed3, h\u00e3y theo d\u00f5i \u0111i\u1ec3m n\u1ed1i ngu\u1ed3n, mass, \u0111\u1ea7u v\u00e0o, \u0111\u1ea7u ra v\u00e0 chi\u1ec1u d\u00f2ng \u0111i\u1ec7n tr\u01b0\u1edbc khi t\u00ednh to\u00e1n.<\/p>\n

          \n
          \n

          M\u1ee9c c\u01a1 b\u1ea3n: nh\u1eadn bi\u1ebft \u0111\u01b0\u1eddng d\u00f2ng \u0111i\u1ec7n v\u00e0 \u0111i\u1ec7n \u00e1p<\/h3>\n

          1. MOSFET k\u00eanh N m\u1eafc kh\u00f3a low-side<\/h4>\n

          Nguy\u00ean l\u00fd:<\/strong> Source n\u1ed1i mass, drain n\u1ed1i t\u1ea3i; gate \u0111\u01b0\u1ee3c k\u00e9o l\u00ean \u0111\u1ec3 b\u1eadt v\u00e0 k\u00e9o v\u1ec1 source \u0111\u1ec3 t\u1eaft. \u0110\u00e2y l\u00e0 c\u1ea5u h\u00ecnh d\u1ec5 \u0111i\u1ec1u khi\u1ec3n nh\u1ea5t.<\/p>\n

          \"S\u01a1
          S\u01a1 \u0111\u1ed3 c\u00e1ch m\u1eafc 1: MOSFET k\u00eanh N m\u1eafc kh\u00f3a low-side \u2013 Source n\u1ed1i mass, drain n\u1ed1i t\u1ea3i; gate \u0111\u01b0\u1ee3c k\u00e9o l\u00ean \u0111\u1ec3 b\u1eadt v\u00e0 k\u00e9o v\u1ec1 source \u0111\u1ec3 t\u1eaft. \u0110\u00e2y l\u00e0 c\u1ea5u h\u00ecnh d\u1ec5 \u0111i\u1ec1u khi\u1ec3n nh\u1ea5t.<\/figcaption><\/figure>\n

          2. MOSFET k\u00eanh P m\u1eafc kh\u00f3a high-side<\/h4>\n

          Nguy\u00ean l\u00fd:<\/strong> Source n\u1ed1i ngu\u1ed3n d\u01b0\u01a1ng, drain n\u1ed1i t\u1ea3i; k\u00e9o gate th\u1ea5p h\u01a1n source \u0111\u1ec3 b\u1eadt v\u00e0 k\u00e9o gate v\u1ec1 source \u0111\u1ec3 t\u1eaft.<\/p>\n

          \"S\u01a1
          S\u01a1 \u0111\u1ed3 c\u00e1ch m\u1eafc 2: MOSFET k\u00eanh P m\u1eafc kh\u00f3a high-side \u2013 Source n\u1ed1i ngu\u1ed3n d\u01b0\u01a1ng, drain n\u1ed1i t\u1ea3i; k\u00e9o gate th\u1ea5p h\u01a1n source \u0111\u1ec3 b\u1eadt v\u00e0 k\u00e9o gate v\u1ec1 source \u0111\u1ec3 t\u1eaft.<\/figcaption><\/figure>\n

          3. MOSFET k\u00eanh N m\u1eafc high-side<\/h4>\n

          Nguy\u00ean l\u00fd:<\/strong> Drain n\u1ed1i ngu\u1ed3n d\u01b0\u01a1ng, source c\u1ea5p t\u1ea3i; driver ph\u1ea3i n\u00e2ng gate cao h\u01a1n source \u0111\u1ee7 m\u1ee9c UGS, th\u01b0\u1eddng d\u00f9ng bootstrap ho\u1eb7c ngu\u1ed3n c\u00e1ch ly.<\/p>\n

          \"S\u01a1
          S\u01a1 \u0111\u1ed3 c\u00e1ch m\u1eafc 3: MOSFET k\u00eanh N m\u1eafc high-side \u2013 Drain n\u1ed1i ngu\u1ed3n d\u01b0\u01a1ng, source c\u1ea5p t\u1ea3i; driver ph\u1ea3i n\u00e2ng gate cao h\u01a1n source \u0111\u1ee7 m\u1ee9c UGS, th\u01b0\u1eddng d\u00f9ng bootstrap ho\u1eb7c ngu\u1ed3n c\u00e1ch ly.<\/figcaption><\/figure>\n<\/section>\n
          \n

          M\u1ee9c th\u1ef1c h\u00e0nh: \u1ee9ng d\u1ee5ng trong c\u00e1c kh\u1ed1i m\u1ea1ch<\/h3>\n

          4. M\u1eafc common-source khu\u1ebfch \u0111\u1ea1i<\/h4>\n

          Nguy\u00ean l\u00fd:<\/strong> T\u00edn hi\u1ec7u v\u00e0o gate, \u0111\u1ea7u ra l\u1ea5y \u1edf drain; t\u1ea7ng khu\u1ebfch \u0111\u1ea1i \u0111\u1ea3o pha v\u00e0 c\u1ea7n \u0111\u1eb7t \u0111\u00fang \u0111i\u1ec3m l\u00e0m vi\u1ec7c.<\/p>\n

          \"S\u01a1
          S\u01a1 \u0111\u1ed3 c\u00e1ch m\u1eafc 4: M\u1eafc common-source khu\u1ebfch \u0111\u1ea1i \u2013 T\u00edn hi\u1ec7u v\u00e0o gate, \u0111\u1ea7u ra l\u1ea5y \u1edf drain; t\u1ea7ng khu\u1ebfch \u0111\u1ea1i \u0111\u1ea3o pha v\u00e0 c\u1ea7n \u0111\u1eb7t \u0111\u00fang \u0111i\u1ec3m l\u00e0m vi\u1ec7c.<\/figcaption><\/figure>\n

          5. M\u1eafc source follower<\/h4>\n

          Nguy\u00ean l\u00fd:<\/strong> \u0110\u1ea7u ra l\u1ea5y \u1edf source, b\u00e1m theo gate th\u1ea5p h\u01a1n m\u1ed9t m\u1ee9c ph\u1ee5 thu\u1ed9c d\u00f2ng; d\u00f9ng l\u00e0m b\u1ed9 \u0111\u1ec7m nh\u01b0ng kh\u00f4ng ph\u1ea3i ngu\u1ed3n \u00e1p l\u00fd t\u01b0\u1edfng.<\/p>\n

          \"S\u01a1
          S\u01a1 \u0111\u1ed3 c\u00e1ch m\u1eafc 5: M\u1eafc source follower \u2013 \u0110\u1ea7u ra l\u1ea5y \u1edf source, b\u00e1m theo gate th\u1ea5p h\u01a1n m\u1ed9t m\u1ee9c ph\u1ee5 thu\u1ed9c d\u00f2ng; d\u00f9ng l\u00e0m b\u1ed9 \u0111\u1ec7m nh\u01b0ng kh\u00f4ng ph\u1ea3i ngu\u1ed3n \u00e1p l\u00fd t\u01b0\u1edfng.<\/figcaption><\/figure>\n

          6. M\u1eafc half-bridge hai MOSFET k\u00eanh N<\/h4>\n

          Nguy\u00ean l\u00fd:<\/strong> M\u1ed9t MOSFET high-side v\u00e0 m\u1ed9t MOSFET low-side \u0111\u00f3ng lu\u00e2n phi\u00ean; ph\u1ea3i c\u00f3 dead-time \u0111\u1ec3 tr\u00e1nh d\u1eabn ch\u00e9o.<\/p>\n

          \"S\u01a1
          S\u01a1 \u0111\u1ed3 c\u00e1ch m\u1eafc 6: M\u1eafc half-bridge hai MOSFET k\u00eanh N \u2013 M\u1ed9t MOSFET high-side v\u00e0 m\u1ed9t MOSFET low-side \u0111\u00f3ng lu\u00e2n phi\u00ean; ph\u1ea3i c\u00f3 dead-time \u0111\u1ec3 tr\u00e1nh d\u1eabn ch\u00e9o.<\/figcaption><\/figure>\n<\/section>\n
          \n

          M\u1ee9c n\u00e2ng cao: \u0111o l\u01b0\u1eddng, b\u1ea3o v\u1ec7 v\u00e0 x\u1eed l\u00fd t\u00edn hi\u1ec7u<\/h3>\n

          7. M\u1eafc c\u1eb7p b\u1ed5 sung k\u00eanh N v\u00e0 k\u00eanh P<\/h4>\n

          Nguy\u00ean l\u00fd:<\/strong> Hai lo\u1ea1i k\u00eanh ph\u1ed1i h\u1ee3p trong t\u1ea7ng push-pull ho\u1eb7c CMOS; c\u1ef1c t\u00ednh \u0111i\u1ec1u khi\u1ec3n v\u00e0 diode th\u00e2n ph\u1ea3i \u0111\u01b0\u1ee3c ki\u1ec3m tra ri\u00eang.<\/p>\n

          \"S\u01a1
          S\u01a1 \u0111\u1ed3 c\u00e1ch m\u1eafc 7: M\u1eafc c\u1eb7p b\u1ed5 sung k\u00eanh N v\u00e0 k\u00eanh P \u2013 Hai lo\u1ea1i k\u00eanh ph\u1ed1i h\u1ee3p trong t\u1ea7ng push-pull ho\u1eb7c CMOS; c\u1ef1c t\u00ednh \u0111i\u1ec1u khi\u1ec3n v\u00e0 diode th\u00e2n ph\u1ea3i \u0111\u01b0\u1ee3c ki\u1ec3m tra ri\u00eang.<\/figcaption><\/figure>\n

          8. M\u1eafc song song MOSFET c\u00f4ng su\u1ea5t<\/h4>\n

          Nguy\u00ean l\u00fd:<\/strong> C\u1ea7n driver \u0111\u1ee7 d\u00f2ng, \u0111i\u1ec7n tr\u1edf gate ri\u00eang, \u0111\u01b0\u1eddng m\u1ea1ch \u0111\u1ed1i x\u1ee9ng v\u00e0 ki\u1ec3m so\u00e1t nhi\u1ec7t; kh\u00f4ng gh\u00e9p song song ch\u1ec9 theo \u0111\u1ecbnh m\u1ee9c d\u00f2ng.<\/p>\n

          \"S\u01a1
          S\u01a1 \u0111\u1ed3 c\u00e1ch m\u1eafc 8: M\u1eafc song song MOSFET c\u00f4ng su\u1ea5t \u2013 C\u1ea7n driver \u0111\u1ee7 d\u00f2ng, \u0111i\u1ec7n tr\u1edf gate ri\u00eang, \u0111\u01b0\u1eddng m\u1ea1ch \u0111\u1ed1i x\u1ee9ng v\u00e0 ki\u1ec3m so\u00e1t nhi\u1ec7t; kh\u00f4ng gh\u00e9p song song ch\u1ec9 theo \u0111\u1ecbnh m\u1ee9c d\u00f2ng.<\/figcaption><\/figure>\n<\/section>\n<\/div>\n

          8. V\u00ed d\u1ee5 t\u00ednh to\u00e1n v\u00e0 \u1ee9ng d\u1ee5ng<\/h2>\n

          MOSFET k\u00eanh N c\u00f3 RDS(on) 20 m\u03a9 t\u1ea1i UGS = 10 V v\u00e0 mang d\u00f2ng RMS 5 A s\u1ebd c\u00f3 t\u1ed5n hao d\u1eabn g\u1ea7n 0,5 W \u1edf \u0111i\u1ec1u ki\u1ec7n \u0111\u00f3. N\u1ebfu driver ch\u1ec9 c\u1ea5p 5 V, kh\u00f4ng \u0111\u01b0\u1ee3c d\u00f9ng con s\u1ed1 20 m\u03a9 tr\u1eeb khi datasheet c\u0169ng b\u1ea3o \u0111\u1ea3m RDS(on) t\u1ea1i 5 V.<\/p>\n

          \"MOSFET
          \u1ea2nh th\u1ef1c t\u1ebf 5 c\u1ee7a MOSFET d\u00f9ng \u0111\u1ec3 quan s\u00e1t chi ti\u1ebft tr\u00ean linh ki\u1ec7n ho\u1eb7c bo m\u1ea1ch.<\/figcaption><\/figure>\n

          9. C\u00e1ch \u0111\u1ecdc m\u00e3 v\u00e0 datasheet<\/h2>\n

          \u0110\u1ecdc th\u00f4ng s\u1ed1 t\u1ea1i \u0111\u00fang nhi\u1ec7t \u0111\u1ed9 v\u00e0 m\u1ee9c \u0111i\u1ec1u khi\u1ec3n; ki\u1ec3m tra SOA, \u0111\u1eb7c tuy\u1ebfn nhi\u1ec7t, RDS(on)\/VCE(sat), \u0111i\u1ec7n t\u00edch gate, n\u0103ng l\u01b0\u1ee3ng chuy\u1ec3n m\u1ea1ch v\u00e0 s\u01a1 \u0111\u1ed3 ch\u00e2n.<\/p>\n

          H\u00e3y ph\u00e2n bi\u1ec7t th\u00f4ng s\u1ed1 l\u00e0m vi\u1ec7c khuy\u1ebfn ngh\u1ecb v\u1edbi gi\u1edbi h\u1ea1n tuy\u1ec7t \u0111\u1ed1i. Gi\u1edbi h\u1ea1n tuy\u1ec7t \u0111\u1ed1i kh\u00f4ng ph\u1ea3i l\u00e0 m\u1ee9c n\u00ean duy tr\u00ec trong qu\u00e1 tr\u00ecnh v\u1eadn h\u00e0nh.<\/p>\n

          \"MOSFET
          \u1ea2nh th\u1ef1c t\u1ebf 6 c\u1ee7a MOSFET d\u00f9ng \u0111\u1ec3 quan s\u00e1t chi ti\u1ebft tr\u00ean linh ki\u1ec7n ho\u1eb7c bo m\u1ea1ch.<\/figcaption><\/figure>\n

          10. C\u00e1ch \u0111o v\u00e0 ki\u1ec3m tra tr\u00ean bo m\u1ea1ch<\/h2>\n
            \n
          1. \u0110\u1ecdc datasheet \u0111\u1ec3 x\u00e1c \u0111\u1ecbnh \u0111\u00fang G, D, S v\u00e0 lo\u1ea1i k\u00eanh<\/li>\n
          2. Ng\u1eaft ngu\u1ed3n, x\u1ea3 t\u1ee5 v\u00e0 l\u00e0m ng\u1eafn G\u2013S tr\u01b0\u1edbc khi \u0111o<\/li>\n
          3. D\u00f9ng thang diode ki\u1ec3m tra chi\u1ec1u diode th\u00e2n: k\u00eanh N th\u01b0\u1eddng d\u1eabn t\u1eeb S sang D, k\u00eanh P theo chi\u1ec1u ng\u01b0\u1ee3c l\u1ea1i<\/li>\n
          4. Ki\u1ec3m tra c\u00e1ch \u0111i\u1ec7n G\u2013S v\u00e0 G\u2013D; \u0111i\u1ec7n tr\u1edf th\u1ea5p b\u1ea5t th\u01b0\u1eddng th\u01b0\u1eddng l\u00e0 d\u1ea5u hi\u1ec7u gate b\u1ecb th\u1ee7ng<\/li>\n
          5. Khi m\u1ea1ch ch\u1ea1y, \u0111o UGS, UDS, d\u1ea1ng s\u00f3ng chuy\u1ec3n m\u1ea1ch v\u00e0 nhi\u1ec7t; d\u00f9ng \u0111\u1ea7u d\u00f2 ph\u00f9 h\u1ee3p \u0111i\u1ec7n \u00e1p v\u00e0 mass<\/li>\n<\/ol>\n

            Khi \u0111o tr\u1ef1c ti\u1ebfp tr\u00ean bo, c\u00e1c linh ki\u1ec7n n\u1ed1i v\u1edbi c\u00f9ng n\u00fat m\u1ea1ch c\u00f3 th\u1ec3 l\u00e0m k\u1ebft qu\u1ea3 kh\u00e1c tr\u1ecb s\u1ed1 ri\u00eang c\u1ee7a linh ki\u1ec7n. N\u1ebfu c\u1ea7n \u0111o \u0111\u1ed9c l\u1eadp, ch\u1ec9 th\u00e1o m\u1ed9t \u0111\u1ea7u ho\u1eb7c ch\u00e2n \u0111o ph\u00f9 h\u1ee3p sau khi \u0111\u00e3 ng\u1eaft ngu\u1ed3n v\u00e0 x\u1ea3 h\u1ebft \u0111i\u1ec7n t\u00edch.<\/p>\n

            11. D\u1ea1ng h\u01b0 h\u1ecfng v\u00e0 nguy\u00ean nh\u00e2n<\/h2>\n

            D\u1ea5u hi\u1ec7u c\u00f3 th\u1ec3 quan s\u00e1t ho\u1eb7c \u0111o \u0111\u01b0\u1ee3c<\/h3>\n
              \n
            • Ch\u1eadp c\u1ef1c c\u00f4ng su\u1ea5t<\/li>\n
            • R\u00f2 gate\/base<\/li>\n
            • Kh\u00f4ng m\u1edf ho\u1eb7c kh\u00f4ng t\u1eaft h\u1ebft<\/li>\n
            • T\u1ed5n hao t\u0103ng khi n\u00f3ng<\/li>\n
            • N\u1ee9t package ho\u1eb7c bong m\u1ed1i h\u00e0n<\/li>\n<\/ul>\n

              Nh\u1eefng nguy\u00ean nh\u00e2n c\u1ea7n ki\u1ec3m tra<\/h3>\n
                \n
              • V\u01b0\u1ee3t SOA<\/li>\n
              • Driver gate kh\u00f4ng \u0111\u1ee7 m\u1ea1nh ho\u1eb7c d\u1eabn ch\u00e9o<\/li>\n
              • Xung \u00e1p do t\u1ea3i c\u1ea3m<\/li>\n
              • T\u1ea3n nhi\u1ec7t k\u00e9m<\/li>\n
              • ESD ho\u1eb7c qu\u00e1 \u00e1p gate<\/li>\n<\/ul>\n

                M\u1ed9t d\u1ea5u hi\u1ec7u c\u00f3 th\u1ec3 xu\u1ea5t ph\u00e1t t\u1eeb nhi\u1ec1u nguy\u00ean nh\u00e2n. Ch\u1ec9 k\u1ebft lu\u1eadn linh ki\u1ec7n h\u1ecfng sau khi k\u1ebft h\u1ee3p k\u1ebft qu\u1ea3 \u0111o, s\u01a1 \u0111\u1ed3 m\u1ea1ch v\u00e0 \u0111i\u1ec1u ki\u1ec7n v\u1eadn h\u00e0nh.<\/p>\n

                12. C\u00e1ch l\u1ef1a ch\u1ecdn linh ki\u1ec7n thay th\u1ebf<\/h2>\n
                  \n
                • \u0110\u00fang lo\u1ea1i v\u00e0 s\u01a1 \u0111\u1ed3 ch\u00e2n<\/li>\n
                • \u0110i\u1ec7n \u00e1p, d\u00f2ng, SOA v\u00e0 nhi\u1ec7t kh\u00f4ng th\u1ea5p h\u01a1n<\/li>\n
                • Th\u00f4ng s\u1ed1 d\u1eabn v\u00e0 chuy\u1ec3n m\u1ea1ch ph\u00f9 h\u1ee3p<\/li>\n
                • Driver ph\u1ea3i c\u1ea5p \u0111\u00fang m\u1ee9c \u0111i\u1ec1u khi\u1ec3n<\/li>\n
                • \u0110\u00fang package v\u00e0 c\u00e1ch \u0111i\u1ec7n t\u1ea3n nhi\u1ec7t<\/li>\n<\/ul>\n

                  13. C\u00e2u h\u1ecfi th\u01b0\u1eddng g\u1eb7p<\/h2>\n

                  C\u00f3 th\u1ec3 \u0111o MOSFET tr\u1ef1c ti\u1ebfp tr\u00ean bo m\u1ea1ch kh\u00f4ng?<\/h3>\n

                  C\u00f3 th\u1ec3 ki\u1ec3m tra s\u01a1 b\u1ed9 sau khi \u0111\u00e3 ng\u1eaft ngu\u1ed3n v\u00e0 x\u1ea3 \u0111i\u1ec7n t\u00edch. Tuy nhi\u00ean, nh\u1eefng nh\u00e1nh m\u1ea1ch n\u1ed1i song song ho\u1eb7c linh ki\u1ec7n b\u1ea3o v\u1ec7 c\u00f3 th\u1ec3 l\u00e0m sai k\u1ebft qu\u1ea3; khi c\u1ea7n \u0111o \u0111\u1ed9c l\u1eadp ph\u1ea3i t\u00e1ch ch\u00e2n ph\u00f9 h\u1ee3p v\u00e0 \u0111\u1ed1i chi\u1ebfu s\u01a1 \u0111\u1ed3.<\/p>\n

                  C\u00f3 th\u1ec3 d\u00f9ng linh ki\u1ec7n c\u00f3 th\u00f4ng s\u1ed1 cao h\u01a1n \u0111\u1ec3 thay th\u1ebf kh\u00f4ng?<\/h3>\n

                  Tr\u01b0\u1edbc h\u1ebft, linh ki\u1ec7n thay th\u1ebf ph\u1ea3i \u0111\u00fang ch\u1ee9c n\u0103ng v\u00e0 tr\u1ecb s\u1ed1 ch\u00ednh. M\u1ed9t s\u1ed1 gi\u1edbi h\u1ea1n nh\u01b0 c\u00f4ng su\u1ea5t ho\u1eb7c \u0111i\u1ec7n \u00e1p c\u00f3 th\u1ec3 ch\u1ecdn cao h\u01a1n, nh\u01b0ng k\u00edch th\u01b0\u1edbc, \u0111\u1eb7c t\u00ednh xung, t\u1ea7n s\u1ed1 v\u00e0 nhi\u1ec7t v\u1eabn ph\u1ea3i ph\u00f9 h\u1ee3p. V\u1edbi linh ki\u1ec7n nhi\u1ec1u ch\u00e2n, s\u01a1 \u0111\u1ed3 ch\u00e2n b\u1eaft bu\u1ed9c ph\u1ea3i t\u01b0\u01a1ng th\u00edch.<\/p>\n

                  \n

                  T\u00e0i li\u1ec7u tham kh\u1ea3o<\/h2>\n

                  C\u00e1c t\u00e0i li\u1ec7u d\u01b0\u1edbi \u0111\u00e2y \u0111\u01b0\u1ee3c d\u00f9ng \u0111\u1ec3 \u0111\u1ed1i chi\u1ebfu k\u00fd hi\u1ec7u, nguy\u00ean l\u00fd, th\u00f4ng s\u1ed1 v\u00e0 ph\u01b0\u01a1ng ph\u00e1p \u0111o ki\u1ec3m c\u1ee7a linh ki\u1ec7n.<\/p>\n

                    \n
                  1. [1] Digital Logic And Microprocessor Design With VHDL<\/strong> \u2014 trang 6, trang 147.<\/li>\n
                  2. [2] McGraw-Hill Teach Yourself Electricity and ElectronicsEbook-FLY<\/strong> \u2014 trang 443.<\/li>\n
                  3. [3] Circuits for the Hobbyist<\/strong> \u2014 trang 176.<\/li>\n
                  4. [4] The Illustrated dictionary of electronics<\/strong> \u2014 trang 193, trang 534.<\/li>\n
                  5. [5] CMOS Electronics How It Works How It Fails<\/strong> \u2014 trang 66.<\/li>\n
                  6. [6] file PDF<\/strong> \u2014 trang 471.<\/li>\n<\/ol>\n<\/section>\n

                    14. K\u1ebft lu\u1eadn<\/h2>\n

                    Mu\u1ed1n s\u1eed d\u1ee5ng linh ki\u1ec7n n\u00e0y \u0111\u00fang c\u00e1ch, ng\u01b0\u1eddi \u0111\u1ecdc c\u1ea7n nh\u1eadn d\u1ea1ng \u0111\u00fang lo\u1ea1i, hi\u1ec3u k\u00fd hi\u1ec7u v\u00e0 \u0111\u01b0\u1eddng k\u1ebft n\u1ed1i, t\u00ednh \u0111\u01b0\u1ee3c \u0111i\u1ec1u ki\u1ec7n l\u00e0m vi\u1ec7c, \u0111o ki\u1ec3m an to\u00e0n v\u00e0 \u0111\u1ed1i chi\u1ebfu datasheet tr\u01b0\u1edbc khi thay th\u1ebf.<\/p>\n","protected":false},"excerpt":{"rendered":"

                    T\u00ecm hi\u1ec3u MOSFET: k\u00fd hi\u1ec7u, ki\u1ec3u \u0111\u00f3ng g\u00f3i, c\u00f4ng th\u1ee9c, c\u00e1ch m\u1eafc trong m\u1ea1ch, ph\u01b0\u01a1ng ph\u00e1p \u0111o, l\u1ed7i th\u01b0\u1eddng g\u1eb7p v\u00e0 c\u00e1ch ch\u1ecdn linh ki\u1ec7n thay th\u1ebf.<\/p>\n","protected":false},"author":1,"featured_media":2254,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[22],"tags":[],"class_list":["post-2271","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-dien-tu"],"yoast_head":"\nMOSFET l\u00e0 g\u00ec? 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